This post is part of a comparative project on compute governance in East Asia, initiated as part of the inaugural round of AI Gov Sprints. Many thanks to David Sanchez Garcia, who led this project and whose feedback greatly benefited this piece, and to all who gave feedback on earlier drafts. This post was lightly edited for flow using Claude; all ideas and arguments are my own. All mistakes, too, are my own.
A lot of compute governance discourse focuses on the US-China dynamic, alongside Taiwan sometimes emerging too. Japan, meanwhile, tends to show up merely as a supporting character. I think this framing undersells its actual position.
Japan sits at several critical chokepoints in the global compute supply chain, is currently making large public bets on semiconductor revival, and is navigating a difficult tension between US-aligned export controls and unavoidable commercial dependence on China. This could make it a revealing case for “middle powers” navigating compute and its governance, which is reason enough to look. Hence, this post is an attempt to map Japan's position in global compute supply chains (alongside its strengths, bets, and vulnerabilities) as a starting point.
I am a complete non-expert writing this out of curiosity. I have no prior background in semiconductors, supply chain policy, or Japanese industrial history. Whilst I’m currently more certain about the broad narrative arc for Japan and its relevance, I’m less confident about some precise figures (which occasionally varied across sources). I’ve tried to be accurate by gleaning and linking adequate sources throughout, but I always welcome corrections.
Once home to six of the world's ten largest semiconductor firms, Japan has watched its global market share collapse in three decades.
In the 1980s, Japan was the undisputed semiconductor superpower. Six of the top ten semiconductor companies in the world in 1989 were Japanese, and Japan commanded over 50% of global chip sales. By 2023, that share had collapsed to below 10%.
The proximate causes for this decline were mostly external. The Plaza Accord's yen appreciation devastated the price competitiveness of Japanese exports, and a series of US-imposed trade barriers compounded the damage, especially the 1986 Semiconductor Agreement, which restricted Japan's access to American markets. In 1987, the US imposed 100% tariffs on Japanese memory chips, delivering a blow from which several firms never recovered.
Yet some structural causes also were internal. Japanese firms clung too long to the “Integrated Device Manufacturer” model, maintaining fully in-house operations from design to fabrication at a moment when American and Taiwanese firms were pivoting toward the specialised fabless-and-foundry model that now dominates the global industry.
The consequences, ultimately, were pretty much catastrophic.
Once-legendary semiconductor divisions were forced into bankruptcy or consolidation, exemplified by the merger of the DRAM departments of Hitachi and NEC into Elpida Memory, which itself later failed.
Japan's story thus stands as a cautionary tale about the cost of institutional rigidity for middle powers making the transition to a digitalised society. It is precisely this history that frames today's revitalisation.
Today, Japan still controls several critical segments of the compute supply chain.
In materials, Japan's position is extraordinary, as mapped in this CSIS piece. The Japanese firms Shin-Etsu and Sumco are the world's largest silicon wafer manufacturers, holding 29.4% and 21.9% global market shares respectively. Japan also holds the world's second-largest semiconductor manufacturing equipment (SME) industry, capturing 29% of global sales. This makes Japan second to only the United States for SME production, and places the nation far above other East Asian nations: China, Taiwan, and South Korea make up merely 2%, 0.4%, and 4.8% of the global market share respectively.
The concentration of Japanese dominance in specific niches is even more pronounced: Japan controls a large proportion of the market for coaters and developers (the tools that apply and develop photoresist layers on wafers). Tokyo Electron has a near dominant share for EUV developers, which is equipment used in the most advanced chipmaking processes in existence.
The scale of Japan's financial commitment to compute infrastructure is, by any measure, extraordinary. Japanese fiscal support amounts to approximately 0.71% of GDP (roughly $27 billion) representing fiscal spending that proportionately exceeds that of the United States (0.21%) and Germany (0.41%). Government funding between 2021 and 2023 alone reached ¥3.9 trillion (~$26bn); over ¥50 trillion (~$330bn) in combined public and private investment is the projected total.
The most immediately tangible expression of Japan's semiconductor revitalisation is the establishment of TSMC's Kumamoto facility under the Japan Advanced Semiconductor Manufacturing (JASM) joint venture, a project that brings together TSMC with major Japanese firms including Sony, DENSO, and Toyota, with TSMC holding an 86.5% equity stake.
The scale is striking. Total investment across two fabrication plants is in the billions, with TSMC Fab 23 in Kumamoto representing a US$23 billion factory. Government subsidies cover two-fifths of capital costs. Together, these facilities are expected to achieve a total production capacity of more than 100,000 12-inch wafers per month, using process technologies ranging from 40nm to 6/7nm.
The economic ripple effects are projected to be substantial: a US$51 billion contribution over ten years, and the creation of over 10,700 regional jobs, with the Kumamoto site directly creating more than 3,400 professional positions. This "Silicon Island" ecosystem in Kyushu has already attracted over 100 chip-related investments since 2021, and more than 200 semiconductor-related companies now operate in Kumamoto. Over 60 firms have established an emerging semiconductor cluster in Kyushu, with TSMC leveraging Japan's deep industrial ecosystem of specialised materials and equipment suppliers like Tokyo Electron.
The speed of construction is itself a signal. Local workers allegedly built the fab in just 20 months, compared to a standard three years.[1] Japan's institutional capacity to mobilise around an industrial project is a competitive asset.
If JASM represents the lower-risk track of Japan's dual-track strategy, Rapidus represents the high-stakes gamble: an attempt to re-enter the global race for advanced logic integrated circuits (which Japan previously abandoned at the 22/20nm level) by leapfrogging directly to 2nm.
Rapidus is a private corporation founded in August 2022, led by industry veterans from Tokyo Electron and Western Digital. Eight major Japanese firms, including Toyota and SoftBank, provide funding. The Japanese government, meanwhile, holds a 40% ownership stake.[2]
As of May 2026, $4 billion in fresh funding has been approved by METI (Ministry of Economy, Trade and Industry), bringing total cumulative government R&D support to ¥2.35 trillion. The total project cost estimated to require around ¥5 trillion (~$35 billion) before mass production can begin. The workforce is growing rapidly: 20 to 30 new employees join every month.
Rapidus is targeting 2nm mass production by 2027, at a planned 25,000 wafer starts per month. The government views the transition to 2nm architecture as a "blank-slate challenge.” Because the technology differs fundamentally from other generations, it provides a window for Japan to break into the market without having to overcome incumbents with established manufacturing runs at the same node. The geographic home for this ambition is Hokkaido, which Japan is attempting to transform into "Hokkaido Valley," a global hub for advanced semiconductors.
Rapidus CEO Atsuyoshi Koike claims the company's competitive edge will be delivering finished chips three to four times faster than any global rival. Instead of positioning itself as a direct competitor to TSMC in volume, Rapidus pitches itself as a nimble, precision-focused foundry targeting a niche for small-batch, high-speed, customised manufacturing tailored for AI startups, quantum computing, and specialised industrial applications.
However, one analysis identifies "customer acquisition" as the biggest commercial risk: building a factory is easier than securing enough orders to justify immense operating costs. The measure of success will be whether Rapidus can remain competitive without perpetual state aid.
A more fundamental critique questions whether creating Rapidus from scratch is a reasonable path toward supply chain resilience compared to simply expanding existing TSMC partnerships. The unorthodox single-wafer production model Rapidus is pursuing could fulfil demand for speed that mass-scale foundries like TSMC cannot meet, but it also reflects a manufacturing philosophy that has never been validated at commercial scale.
The geographic logic of Japan's semiconductor revival is crystallising around two poles.
Kyushu builds on existing strengths and proven partnerships.
Hokkaido bets on an unproven company and an unprecedented technological leap.
Together they reflect the dual character of Japan's entire semiconductor strategy: one foot in pragmatism, the other in transformative ambition.
Japan frames its semiconductor and AI ambitions in unusually expansive terms. The journey began with the 2016 "Society 5.0" vision, which positioned AI as a tool for human-centric social resolution. Where other powers frame compute dominance in terms of supremacy or security, Japan's framing is much more integrative and even congenial: technology in service of society, not the other way around. Compute governance, in Japan's framing, is ultimately a vehicle for the allocation of resources toward beneficial applications, and for realising Society 5.0.
Now, whether this framing meaningfully shapes policy outcomes (or perhaps functions merely as a legitimising narrative for industrial strategy that would exist regardless) is harder to assess. Certain budget allocations (discussed below) suggest an accelerator instinct runs deeper than the civilisational framing implies.
For Japan’s AI governance scene, a major legal milestone came in 2018 with an amendment to the Copyright Act (Article 30-4), which famously permitted data scraping for AI training without rights-holder permission, a move that established Japan as a "machine-learning paradise" and gave domestic AI developers a significant advantage in training data access.
The rapid rise of generative AI in 2023 forced a reckoning with this deliberately light architecture. Japan's G7 presidency that year produced the Hiroshima AI Process (HAIP), initiated in May 2023, the first international framework for generative AI governance, which was rapidly realised just seven months after the launch of the process.
The Japan AI Safety Institute (AISI) was launched in February 2024. Unlike the UK's AISI, which functions as a "startup within government," or the EU AI Office's regulatory enforcement role, Japan AISI acts primarily as a hub for information gathering. It has no regulatory power. This seems to contradict what Akiko Murakami, the Director of Japan AISI, has stated: "You can't step on the accelerator without a brake." Moreover, a supplemental budget allocated $2.1 billion for AI overall, of which only roughly $7 million was specifically for risk response. This ratio reveals the real balance of priorities.
The semiconductor strategy and the AI governance framework converge in Japan's AI compute ecosystem, the physical and institutional infrastructure through which compute will actually be deployed for productive use.
Japan's AI compute infrastructure is anchored by Fugaku. Fugaku was the world's fastest supercomputer from June 2020 to June 2022, and has demonstrated significant AI workload performance. This performance has been leveraged for high-impact research, including COVID-19 mask simulations.
Concurrently, Japan is experiencing a massive surge in data centre investment driven primarily by AI workloads, which now require rack densities of 40–80 kW, pushing operators toward liquid cooling solutions.
NTT Global Data Centres remains a dominant operator with 1 GW of operational capacity and major expansions, including a 100 MW site in Tochigi, whilst KDDI is developing a 400 MW AI facility in Sakai City, Osaka. A massive 3.1 GW data centre hub is planned for Nanto City. Such "Tier 3 facilities" are growing fastest. Triple-region architectures are becoming standard to work around Tokyo's power constraints, using satellites in Hokkaido or Kyushu to bypass grid congestion.
Japan has established a robust sovereign AI ecosystem, driven by over 30 major domestic LLM variants developed to ensure data sovereignty and security. The leading example is NTT's tsuzumi 2, designed to run on a single GPU whilst matching the performance of much larger external models in specific business domains. Tsuzumi 2 is a purely domestic model built from scratch, offering high security and low cost, and delivering "world-top results" among models of comparable size for Japanese, especially in business and safety domains.
Like the rest of the world, Japan has come to view chip exports as a national security concern and its export control policy as a geopolitically-informed endeavour.
In March 2023, Japan’s METI announced the addition of 23 types of high-performance SME to its export control list. These regulations officially took effect in July 2023, targeting sophisticated tools used in cleaning, deposition, lithography, and etching processes. Even though Japanese officials maintain that these measures apply to all regions and are not targeted at a specific country, it seems to me that they functionally limit the export of advanced equipment to China.
Enforcement operates through a tiered licensing framework under the Foreign Exchange and Foreign Trade Act. Exports to 42 "preferred" countries (including the United States, Taiwan, and South Korea) are eligible for a simplified General Bulk License. Exports to approximately 160 other destinations, including China, require either an individual license or a more restrictive Special/Specific Bulk License.
However, Japan's export control architecture has notable gaps that distinguish it from the American approach. Japan does not currently restrict the re-export of controlled items once they leave the country;[3] instead, METI relies on case-by-case goodwill agreements where exporters voluntarily inform the ministry of re-exports, but Japan actually lacks the legal authority to sanction non-compliance with these agreements.
These asymmetries mean that Japan's export controls, whilst real and consequential, are far less comprehensive in their reach than American controls.
The Chip 4 Alliance comprises the United States, Japan, South Korea, and Taiwan. Collectively, the four members command an 84% share of the global semiconductor market and nearly 99% of the memory chip market.
For Japan, the alliance is partly a lesson learnt from history. Whilst in the 1980s, Japan was isolated by bilateral pressure from the US, today, it has sought to embed itself within a multilateral framework where coordination replaces competition among allies. The irony is not lost that the US, which once wielded trade policy against Japan as a geopolitical weapon, is now one of Japan's closest partners in semiconductor governance.
Yet the alliance is not without tensions and contradictions. Critics argue that it risks creating a digital cartel, an OPEC-like arrangement for semiconductors. The move toward "friendshoring," shifting supply chains away from "countries of concern," has the potential to stifle global competition and innovation, whilst alienating non-participating regions like the EU.
Japan's position within the alliance is shaped by its specific vulnerabilities and strengths. It contributes critical materials, equipment expertise, and manufacturing capacity; it depends on the US for design architecture and technology transfer, on Taiwan for advanced logic manufacturing, and on South Korea for memory.
Japan's strengths exist alongside structural vulnerabilities that its revitalisation strategy seeks to navigate. In several cases, these vulnerabilities could even be severe enough to place the entire enterprise at risk.
The most immediate constraint on Japan's semiconductor ambitions is physical infrastructure. Electricity costs for Japanese fabs are double those in the United States, Taiwan, and South Korea. The surge in data centre demand is already projected to drive 60% of Japan's power demand growth by 2034, with data centre electricity consumption set to triple from 19 TWh in 2024 to 66 TWh, equivalent to the power needs of 15 to 18 million households (>20% of Japan’s current population). Advanced fabs consume 5 million gallons of water daily, and hyperscalers are investing $28 billion in Japan, reshaping the national power grid's requirements in ways utilities are ill-equipped to meet.
While Tokyo and Osaka remain the primary data centre hubs, severe power grid constraints in inner Tokyo (where connection waits can last five to ten years) are forcing a shift toward secondary markets. Grid projects take seven to ten years to complete, failing to meet the five-year deployment window demanded by investors. These delays have already pushed major data centre and foundry projects back to 2029. There is a fundamental disconnect between hyperscaler needs and utility timelines that I reckon no subsidy can easily resolve.
Besides energy, another question remains: who will build the fabs?
Japan's demographic challenge is well-documented; its specific consequences for the semiconductor industry are acute.
Japan faces a domestic talent gap of approximately 40,000 semiconductor engineers, and only ~35% of Japanese students graduate with STEM degrees, which is somewhat behind international competitors. Policy recommendations include immigration reform to create dedicated visas for international semiconductor workers, but Japan's historically restrictive immigration framework makes this a slow and contested path.
Moreover, capital expenditure amongst Japanese front-end manufacturers is well below that of international firms, a gap that ought to be reversed if Japan is to re-establish manufacturing competitiveness.
Even within its revitalisation strategy, Japan faces a stark comparative disadvantage in advanced logic manufacturing. Japanese industry lags global leaders by an estimated 10 years.
Another under-discussed vulnerability is Japan's back-end supply chain gap. Even if front-end fabrication (the making of wafers) succeeds in Japan, those wafers must currently be sent back to Taiwan for assembly and testing. This means Japan's supply chain resilience remains incomplete even in success scenarios, dependent on the very geography it is trying to diversify away from.
In the power semiconductor segment (which is one of Japan's remaining areas of comparative strengths), the country's technological lead has reportedly shrunk to just three years. Chinese newcomers TanKeBlue and SICC have rapidly secured over 17% market share each, and Chinese firms benefit from energy costs being 30–40% of substrate manufacturing expenses.[4] Rohm, one of Japan's leading power semiconductor firms, reported its first annual loss in 12 years due to slowing EV markets and Chinese competition.
Yet perhaps the most awkward vulnerability is Japan's dependence on China across multiple dimensions simultaneously. China accounts for around 30% of Japanese semiconductor equipment exports, which is a commercial relationship of enormous value. At the same time, China dominates the global supply of critical minerals essential to Japan's semiconductor future: 90% of global gallium production and 60% of global germanium production. Recent Chinese export bans on these materials, which are vital for high-performance Gallium Nitride semiconductors, have already reverberated through the market; antimony prices more than doubled to over $39,000 per metric ton following partial export restrictions. Japan currently navigates a difficult balance between aligning with US-led security restrictions and maintaining this vital commercial relationship, a tension that sits at the heart of every export control decision Tokyo makes.
Japan’s ability to navigate these vulnerabilities might be a good stress test for the durability of its semiconductor renaissance.
This stands in contrast to TSMC's Arizona plant, where progress has been slower.
The Japanese government also holds a unique "golden share" veto authority that allows the state to override major strategic decisions despite being a minority voting (11.5%) shareholder. Note here that ownership share (40%) differs from voting share (11.5%).
Re-exports refer to the process where goods or technologies originally exported from one country (such as Japan) to an intermediate destination are subsequently shipped again to a third country. This concept is a key part of international trade controls, as it determines if the original country's regulations continue to apply to the product after it has left its first foreign destination. Currently, Japan does not account for re-exports heavily in their export control policy.
This refers to the total material and production costs incurred for creating the base material (substrate) upon which the main electronic components of semiconductors are made.
